1 /*
2     DSDL
3     Copyright (C) 2025 Inochi2D Project <luna@foxgirls.gay>
4 
5     This software is provided 'as-is', without any express or implied
6     warranty.  In no event will the authors be held liable for any damages
7     arising from the use of this software.
8 
9     Permission is granted to anyone to use this software for any purpose,
10     including commercial applications, and to alter it and redistribute it
11     freely, subject to the following restrictions:
12 
13     1. The origin of this software must not be misrepresented; you must not
14         claim that you wrote the original software. If you use this software
15         in a product, an acknowledgment in the product documentation would be
16         appreciated but is not required.
17     2. Altered source versions must be plainly marked as such, and must not be
18         misrepresented as being the original software.
19     3. This notice may not be removed or altered from any source distribution.
20 
21     ==========================================================================
22 
23     Simple DirectMedia Layer
24     Copyright (C) 1997-2025 Sam Lantinga <slouken@libsdl.org>
25 
26     This software is provided 'as-is', without any express or implied
27     warranty.  In no event will the authors be held liable for any damages
28     arising from the use of this software.
29 
30     Permission is granted to anyone to use this software for any purpose,
31     including commercial applications, and to alter it and redistribute it
32     freely, subject to the following restrictions:
33 
34     1. The origin of this software must not be misrepresented; you must not
35         claim that you wrote the original software. If you use this software
36         in a product, an acknowledgment in the product documentation would be
37         appreciated but is not required.
38     2. Altered source versions must be plainly marked as such, and must not be
39         misrepresented as being the original software.
40     3. This notice may not be removed or altered from any source distribution.
41 */
42 
43 /**
44     SDL CPU Info
45 
46     See_Also:
47         $(LINK2 https://wiki.libsdl.org/SDL3/CategoryCPUInfo, SDL3 CategoryCPUInfo Documentation)
48     
49     Copyright: © 2025 Inochi2D Project, © 1997-2025 Sam Lantinga
50     License: Subject to the terms of the Zlib License, as written in the LICENSE file.
51     Authors: 
52         Luna Nielsen
53 */
54 module sdl.cpuinfo;
55 extern(C) nothrow @nogc:
56 
57 /**
58     A guess for the cacheline size used for padding.
59 
60     Most x86 processors have a 64 byte cache line. The 64-bit PowerPC
61     processors have a 128 byte cache line. We use the larger value to be
62     generally safe.
63 */
64 version(X86) enum SDL_CACHE_LINE_SIZE = 64;
65 else version(X86_64) enum SDL_CACHE_LINE_SIZE = 64;
66 else version(PPC64) enum SDL_CACHE_LINE_SIZE = 128;
67 else enum SDL_CACHE_LINE_SIZE = 128; // Fallback
68 
69 
70 /**
71     Get the number of logical CPU cores available.
72 
73     Returns:
74         The total number of logical CPU cores. On CPUs that include
75         technologies such as hyperthreading, the number of logical cores
76         may be more than the number of physical cores.
77 
78     Threadsafety:
79         It is safe to call this function from any thread.
80 */
81 extern int SDL_GetNumLogicalCPUCores();
82 
83 /**
84     Determine the L1 cache line size of the CPU.
85 
86     This is useful for determining multi-threaded structure padding or SIMD
87     prefetch sizes.
88 
89     Returns:
90         The L1 cache line size of the CPU, in bytes.
91 
92     Threadsafety:
93         It is safe to call this function from any thread.
94 */
95 extern int SDL_GetCPUCacheLineSize();
96 
97 /**
98     Determine whether the CPU has AltiVec features.
99 
100     This always returns $(D false) on CPUs that aren't using PowerPC instruction
101     sets.
102 
103     Returns:
104         $(D true) if the CPU has AltiVec features,
105         $(D false) otherwise.
106 
107     Threadsafety:
108         It is safe to call this function from any thread.
109 */
110 extern bool SDL_HasAltiVec();
111 
112 /**
113     Determine whether the CPU has MMX features.
114 
115     This always returns $(D false) on CPUs that aren't using Intel instruction sets.
116 
117     Returns:
118         $(D true) if the CPU has MMX features,
119         $(D false) otherwise.
120 
121     Threadsafety:
122         It is safe to call this function from any thread.
123 */
124 extern bool SDL_HasMMX();
125 
126 /**
127     Determine whether the CPU has SSE features.
128 
129     This always returns $(D false) on CPUs that aren't using Intel instruction sets.
130 
131     Returns:
132         $(D true) if the CPU has SSE features,
133         $(D false) otherwise.
134 
135     Threadsafety:
136         It is safe to call this function from any thread.
137 
138     See_Also:
139         $(D SDL_HasSSE2)
140         $(D SDL_HasSSE3)
141         $(D SDL_HasSSE41)
142         $(D SDL_HasSSE42)
143 */
144 extern bool SDL_HasSSE();
145 
146 /**
147     Determine whether the CPU has SSE2 features.
148 
149     This always returns $(D false) on CPUs that aren't using Intel instruction sets.
150 
151     Returns:
152         $(D true) if the CPU has SSE2 features,
153         $(D false) otherwise.
154 
155     Threadsafety:
156         It is safe to call this function from any thread.
157 
158     See_Also:
159         $(D SDL_HasSSE)
160         $(D SDL_HasSSE3)
161         $(D SDL_HasSSE41)
162         $(D SDL_HasSSE42)
163 */
164 extern bool SDL_HasSSE2();
165 
166 /**
167     Determine whether the CPU has SSE3 features.
168 
169     This always returns $(D false) on CPUs that aren't using Intel instruction sets.
170 
171     Returns:
172         $(D true) if the CPU has SSE3 features,
173         $(D false) otherwise.
174 
175     Threadsafety:
176         It is safe to call this function from any thread.
177 
178     See_Also:
179         $(D SDL_HasSSE)
180         $(D SDL_HasSSE2)
181         $(D SDL_HasSSE41)
182         $(D SDL_HasSSE42)
183 */
184 extern bool SDL_HasSSE3();
185 
186 /**
187     Determine whether the CPU has SSE4.1 features.
188 
189     This always returns $(D false) on CPUs that aren't using Intel instruction sets.
190 
191     Returns:
192         $(D true) if the CPU has SSE4.1 features,
193         $(D false) otherwise.
194 
195     Threadsafety:
196         It is safe to call this function from any thread.
197 
198     See_Also:
199         $(D SDL_HasSSE)
200         $(D SDL_HasSSE2)
201         $(D SDL_HasSSE3)
202         $(D SDL_HasSSE42)
203 */
204 extern bool SDL_HasSSE41();
205 
206 /**
207     Determine whether the CPU has SSE4.2 features.
208 
209     This always returns $(D false) on CPUs that aren't using Intel instruction sets.
210 
211     Returns:
212         $(D true) if the CPU has SSE4.2 features,
213         $(D false) otherwise.
214 
215     Threadsafety:
216         It is safe to call this function from any thread.
217 
218     See_Also:
219         $(D SDL_HasSSE)
220         $(D SDL_HasSSE2)
221         $(D SDL_HasSSE3)
222         $(D SDL_HasSSE41)
223 */
224 extern bool SDL_HasSSE42();
225 
226 /**
227     Determine whether the CPU has AVX features.
228 
229     This always returns $(D false) on CPUs that aren't using Intel instruction sets.
230 
231     Returns:
232         $(D true) if the CPU has AVX features,
233         $(D false) otherwise.
234 
235     Threadsafety:
236         It is safe to call this function from any thread.
237 
238     See_Also:
239         $(D SDL_HasAVX2)
240         $(D SDL_HasAVX512F)
241 */
242 extern bool SDL_HasAVX();
243 
244 /**
245     Determine whether the CPU has AVX2 features.
246 
247     This always returns $(D false) on CPUs that aren't using Intel instruction sets.
248 
249     Returns:
250         $(D true) if the CPU has AVX2 features,
251         $(D false) otherwise.
252 
253     Threadsafety:
254         It is safe to call this function from any thread.
255 
256     See_Also:
257         $(D SDL_HasAVX)
258         $(D SDL_HasAVX512F)
259 */
260 extern bool SDL_HasAVX2();
261 
262 /**
263     Determine whether the CPU has AVX-512F (foundation) features.
264 
265     This always returns $(D false) on CPUs that aren't using Intel instruction sets.
266 
267     Returns:
268         $(D true) if the CPU has AVX-512F features,
269         $(D false) otherwise.
270 
271     Threadsafety:
272         It is safe to call this function from any thread.
273 
274     See_Also:
275         $(D SDL_HasAVX)
276         $(D SDL_HasAVX2)
277 */
278 extern bool SDL_HasAVX512F();
279 
280 /**
281     Determine whether the CPU has ARM SIMD (ARMv6) features.
282 
283     This is different from ARM NEON, which is a different instruction set.
284 
285     This always returns $(D false) on CPUs that aren't using ARM instruction sets.
286 
287     Returns:
288         $(D true) if the CPU has ARM SIMD features,
289         $(D false) otherwise.
290 
291     Threadsafety:
292         It is safe to call this function from any thread.
293 
294     See_Also:
295         $(D SDL_HasNEON)
296 */
297 extern bool SDL_HasARMSIMD();
298 
299 /**
300     Determine whether the CPU has NEON (ARM SIMD) features.
301 
302     This always returns $(D false) on CPUs that aren't using ARM instruction sets.
303 
304     Returns:
305         $(D true) if the CPU has ARM NEON features,
306         $(D false) otherwise.
307 
308     Threadsafety:
309         It is safe to call this function from any thread.
310 */
311 extern bool SDL_HasNEON();
312 
313 /**
314     Determine whether the CPU has LSX (LOONGARCH SIMD) features.
315 
316     This always returns $(D false) on CPUs that aren't using LOONGARCH instruction
317     sets.
318 
319     Returns:
320         $(D true) if the CPU has LOONGARCH LSX features,
321         $(D false) otherwise.
322 
323     Threadsafety:
324         It is safe to call this function from any thread.
325 */
326 extern bool SDL_HasLSX();
327 
328 /**
329     Determine whether the CPU has LASX (LOONGARCH SIMD) features.
330 
331     This always returns $(D false) on CPUs that aren't using LOONGARCH instruction
332     sets.
333 
334     Returns:
335         $(D true) if the CPU has LOONGARCH LASX features,
336         $(D false) otherwise.
337 
338     Threadsafety:
339         It is safe to call this function from any thread.
340 */
341 extern bool SDL_HasLASX();
342 
343 /**
344     Get the amount of RAM configured in the system.
345 
346     Returns:
347         The amount of RAM configured in the system in MiB.
348 
349     Threadsafety:
350         It is safe to call this function from any thread.
351 */
352 extern int SDL_GetSystemRAM();
353 
354 /**
355     Report the alignment this system needs for SIMD allocations.
356 
357     This will return the minimum number of bytes to which a pointer must be
358     aligned to be compatible with SIMD instructions on the current machine. For
359     example, if the machine supports SSE only, it will return 16, but if it
360     supports AVX-512F, it'll return 64 (etc). This only reports values for
361     instruction sets SDL knows about, so if your SDL build doesn't have
362     SDL_HasAVX512F(), then it might return 16 for the SSE support it sees and
363     not 64 for the AVX-512 instructions that exist but SDL doesn't know about.
364     Plan accordingly.
365 
366     Returns:
367         The alignment in bytes needed for available, known SIMD
368         instructions.
369 
370     Threadsafety:
371         It is safe to call this function from any thread.
372 
373     See_Also:
374         $(D SDL_aligned_alloc)
375         $(D SDL_aligned_free)
376 */
377 extern size_t SDL_GetSIMDAlignment();